New process flow for combined three layer and self aligned contacts

In modern CMOS processes, advanced features like self aligned contacts (SAC) and three layer contacts are applied to increase the integration level. In particular, the size of SRAM cells can be reduced by more than 20% without changing the line width if such technologies are incorporated into the design. The price paid for straightforward implementation is lost protection of the field oxide for SAC contacts in the three layer contact area and an additional mask layer. This work describes two enhanced process flows to realize a consistent coexistence of the three layer contact together with the self aligned contact. The new process flows are presented together with a successful implementation in 0.35 /spl mu/m technology, but they are expected to be extendable to beyond 0.18 /spl mu/m.