Hybrid dynamic/quadratic programming algorithm for interconnect tree optimization

We present an algorithm for delay minimization of interconnect trees by simultaneous buffer insertion/sizing and wire sizing in this paper. Both wire widths and buffer sizes are chosen from user-defined discrete sets. Our algorithm integrates the quadratic programming approach for handling a wire branch into the dynamic programming (DP) framework. Our experimental results show that our hybrid dynamic/quadratic programming algorithm is faster, more accurate, and uses considerably less memory than the pure DP approach.