A cell-based design approach for RSFQ circuits based on binary decision diagram

We have proposed a cell-based design approach for rapid single flux quantum (RSFQ) logic circuits. In our design approach, a binary decision diagram (BDD) is used for representation of logical functions in order to reduce the number of gates. We have made a standard cell library, which is composed of only five basic cells. We add one-junction Josephson transmission line (JTL) to the edge of the input and the output node of some basic cells, by which no deterioration of the DC bias margin is observed for the connection of each cell. In the layout level, the size and the position of the input/output node of each cell are equalized. The standard cell circuits were fabricated by NEC 2.5 kA/cm/sup 2/ and Hypres 1.0 kA/cm/sup 2/ Nb standard process and they were tested at low speed.