Fabrication of SiGe optical waveguides using VLSI processing techniques

The fabrication of rib waveguides in SiGe using the local oxidation of silicon (LOCOS) was investigated. Samples consisted of strained Si/sub .97/Ge/sub .03/ or Si/sub .94/Ge/sub .06/ waveguiding layers with silicon cladding layers. The structural stability of these strained layers during thermal cycling up to 1050/spl deg/C was examined using X-ray rocking curve analysis, scanning electron microscopy, and Nomarski microscopy of etched samples. Since single SiGe layers sufficiently thick to support optical waveguiding are typically above the equilibrium critical thickness, dislocation formation during high-temperature processing is unavoidable. This work concentrated on minimizing these dislocations. It was found that the dislocation density induced by the processing can be minimized by using a strain-compensating mask layer as a barrier to oxidation. For a specified thermal oxide layer thickness, higher oxidation temperatures were found to minimize the dislocation density relative to oxidation at temperatures closer to the metastable limit. Furthermore, the large birefringence found in all strained-layer SiGe waveguides is significantly reduced after LOGOS processing. These effects were used to fabricate the first reported optical waveguides and photonic devices in SiGe using standard VLSI-type processing. The device is a 1.3/1.55-/spl mu/m duplexer with wavelength isolation of roughly 10 dB.