A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system

This work proposes a fully integrated random numbers generator. A chaotic system has been chosen as a source of randomness, in order to grant statistical independence and uniform distribution to the 8-bit generated words. An effective and compact architecture, based on a pipeline ADC only, has been singled out and realized in a standard 0.8 /spl mu/m CMOS process. Particularly main circuit non-idealities have been properly managed, in order to enhance the statistical properties of the generated numbers. The randomness has been proved and quantified by post-layout simulations. Finally the circuit occupies 2.2 mm/sup 2/ of silicon area and dissipates 50 mW when clocked at 20 MHz.