Design and implementation of FPGA-based control IC for 3-phase PWM inverter with optimized SVM schemes

This paper presents a novel idea to integrate three PWM schemes based on the Space Vector Modulation (SVM) technique. This includes alternating zero sequence, symmetric sequence and bus clamping strategies all of which are implemented using a single FPGA chip which provides several advantages. A flexible, reliable and very compact system is obviously obtained from this designed chip. Moreover, faster design and verification time, design change without penalty, are additional benefits resulted from FPGA-based IC design. The optimized SVM schemes, frequencies and programmable deadtime that are used to adjust output signals can be set through either 4/spl times/4 keypad or microprocessor port.