A computer aided engineering system for memory BIST

An integrated memory test system is presented. It includes a reconfigurable memory test module, a test algorithm editor, a memory fault simulator, and a test code generator. For a given memory organization, fault list, and test algorithm, the system automatically reports the fault coverage, generates control assembly codes, and produces circuit net list for test pattern generation. The system has been implemented in 9000 lines of C++ program based on the Microsoft Windows graphic user interface. It has been verified on different test algorithms and memory chips.