A serial-link transceiver based on 8 GSample/s A/D and D/A converters in 0.25 /spl mu/m CMOS

On-chip VCOs generate 16 clock phases that drive an 8-way interleaved 4b A/D input receiver and an 8-way interleaved 8b D/A transmitter. 4 GHz bandwidth is achieved by inductors that distribute the I/O capacitance and a transmit equalizer. Digital calibration adjusts the sample timing to 10 ps, the input and output accuracy to <1 LSB and 3 LSBs, respectively.