A 76 mm/sup 2/ 8 Mb chain ferroelectric memory

An 8 Mb chain FeRAM uses 0.25 /spl mu/m 2-metal CMOS technology. A one-pitch-shift cell realizes 5.2 /spl mu/m/sup 2/ cell area. A chain architecture with a hierarchical wordline scheme gives 76 mm/sup 2/ die. Random access time is 40 ns, and cycle time is 70 ns at 3.0 V.