A 29 dBm 1.9 GHz class B power amplifier in a digital CMOS process

A two stage class B power amplifier for 1.9 GHz is presented. The amplifier is fabricated in a standard digital CMOS process with low resistivity substrate. The output power is 29 dBm in a 50 ohm load. A design method, based on sweeping the loss and the resonance frequency of an LC tank to determine large signal parameters of the output transistor, is presented. Based on this method proper values for on-chip interstage matching and off-chip output matching can be derived. Measurement of a fabricated chip is compared with the simulated circuit.