Remaining Useful Performance Estimation for Complex Analog Circuit Based on Maximal Information Coefficient and Bidirectional Gate Recurrent Unit

Degradation of circuit components are typically accompanied by a deviation in component parameters from their normal values, which can ultimately influence the stable operation of complex analog circuit. To address this concern, remaining useful performance (RUP), regarded as the useful performance from the current time to the end of performance, is an effective way to ensure system safety by providing early warning of failure and enabling forecast maintenance. In this paper, a novel RUP estimation method based on the two-stage maximal information coefficient (TSMIC) and bidirectional gate recurrent unit (Bi-GRU) network is proposed. Initially, the run to failure data of the circuit in real-time is obtained by RT-LAB hardware-in-the-loop. Additionally, to obtain suitable features reflecting degradation trend over cycles, a TSMIC method is proposed to eliminate features hardly changing with degradation cycle in the first stage, mine mutual information between features in the second stage. Furthermore, the linear regression model is used as a performance evaluation to retain the original pattern in the selected features. Through the fusion of the selected multi-features, health indicators of different circuit components are constructed. Ultimately, the deep Bi-GRU unit network, which can extract representative time-series information and explore subtle differences of the degradation cycles, is used to generate prediction results. The proposed framework is verified through a case study on the complex analog circuit, and comparisons with other state-of-the-art methods are presented. The experimental results of the case study show the effectiveness and superiority of the proposed approach.