Computer-aided design of a low-cost low-power snubberless three-phase inverter

This paper presents a computer-based design of a low-cost low-power three-phase snubberless inverter. An optimization program has been developed based on switching equations in a regular snubberless inverter leg, having as inputs system requirements as maximum allowable peak voltage during recovery, minimum acceptable (dv/dt) during turn-on and turn-off, the condition to avoid (dv/dt) induced conduction of the "OFF"-state IGBT and the low-cost option of having only a positive gate voltage. The outputs of this optimization procedure are the gate ON/OFF resistors and voltage. Finally, this design is validated experimentally in a system using IR2137 as gate driver.