Cosmic ray neutron multiple-upset measurements in a 0.6-/spl mu/m CMOS process

A major cause of soft error rate in CMOS circuits operating at ground level and airplane flight altitudes are secondary neutrons generated in the atmosphere by primary cosmic rays. We developed a new technique for characterization of a CMOS process with respect to single upsets (SEUs) and multiple upsets (MUs). This technique has been demonstrated for a process with gate length of 0.6 /spl mu/m. In this paper, we present measurements of the upper bound on the MU rate in the atmospheric neutron environment. The measurements were performed with the neutron beam at WNR, LANSCE, Los Alamos, NM. We studied the MU rate dependence on critical charge and supply voltage. The MU rate is given separately for the N and P type MOSFET drains. The MU rate is compared with the SEU rate. Our results demonstrate feasibility of the new technique for fast and simple characterization of a CMOS process. Implications for local redundancy and error correcting techniques are discussed.