The application and use of ATPG data in problem solving efforts to improve yields on advanced microprocessors

Abstract only given, as follows. Bit mapping has always been viewed as the best method to directly identify the defects that cause yield loss. Unfortunately, only array areas can be used to collect this information. With the adoption of Automatic Test Program Generation (ATPG) scans, yield engineers have a new tool to identify problems and improve yields on advanced logic parts. Porting this data into a defect database further enhances our ability to identify random and systematic yield issues. Not only can we overlay the electrical faults with known defect locations, but we can also analyze the data for spatial signatures, which can indicate a systematic design or process issue. This paper will explore the use of some of these methods on AMD's 0.18 um process technology.