A technology development SRAM approach with DFM considerations

A technology development SRAM (TDSRAM/sup TM/) has been highly effective in rapid process technology development, debug, and yield ramp on an advanced CMOS, 0.18 /spl mu/m foundry process technology. TDSRAM is seen to accelerate FEOL and BEOL process debug using technology-oriented design and test approaches while minimizing inherent functional risks associated with IP-like designs at early stages of new technology development programs. Smart array design approaches have proven effective in directing immediate and focused failure analysis activities for rapid identification of root cause failure mechanisms.