APSoC Architecture Design of 2.4 GHz ZigBee Baseband Transceiver for IoT Application

The big idea of this research is to build node design for IoT system which will integrates all required sensor and communication protocol in single chip (SoC) so that designing, integrating and also testing node system can be done in easy way. ZigBee offers many advantages to be used in IoT system, therefore in this research ZigBee chosen as communication protocol for this node design. In this paper we present ZigBee baseband transceiver design implemented in an APSoC (All Programmable System on Chip) architecture. ZigBee transceiver is firstly designed in RTL level using VHDL code, then is implemented in APSoC platform. ZigBee-APSoC system runs well with clock frequency source of 50 MHz. Verification test is carried out by comparing the result of HDL simulation in ModelSim simulator software and the output of APSoC system. Final test is conducted by firstly implementing transceiver design in Xilinx® Zynq®−7000 development board and then performing the functional test in some amount of iteration cycles. Performance of APSoC design is then analyzed for several aspects i.e. total bit error, area consumption and power consumption. Based on the final simulation, no error is found. Furthermore, the power consumption of the transmitter is less than 7 mW, while for the receiver is less than 4 mW.