Multiple SOI layers by multiple Smart-Cut/sup (R)/ transfers

Silicon on insulator (SOI) technologies are now entering mainstream applications, with recent announcements regarding for instance microprocessor applications. One condition for this to happen has been proof that SOI material manufacturing processes exist that are compatible with such industrial developments (availability, cost, quality, etc.). Among those processes, the Smart-Cut/sup (R)/ process is based on layer transfer from one substrate to another (Bruel, 1996). Stacking monocrystalline silicon on another silicon substrate with a silica layer in between is then possible and indeed is being used on a industrial scale to manufacture SOI wafers. Beyond simple SOI wafers that can also be high value added substrates for other applications such as photonics, sensors and other micromachining purposes, we demonstrate in this paper how the Smart-Cut/sup (R)/ process can be seen as a basic step and how this process can be used to realize multiple SOI wafers, allowing different crystalline and/or amorphous layers to be stacked.