Design and applications of SDH cross-connection ASIC

The development of the synchronous digital hierarchy (SDH) technique relies on the evolution of ASIC. This paper introduces a novel SDH cross-connection ASIC designed by the E&E department of Tsinghua University. This chip can provide non-blocking cross-connection based on any combination of TU channels between eight STM-1 input streams and eight STM-1 output streams. A newly developed built-in test circuit is embedded within the chip. This paper also analyses its timing performance and presents its applications.