Fair prioritized scheduling in an input-buffered switch

The rapid growth of inter-networking and the popularity of ATM have resulted in a need for high-speed low-cost network components. This paper presents a new algorithm, Fair Arbitrated Round Robin (FARR), for scheduling the crossbar of a high-speed input-buffered switch. FARR respects virtual circuit (VC) priorities and has per-VC fairness properties that have previously only been achieved in output-buffered switches. Input-buffering is more cost-effective than output-buffering at high speeds, due to much more lenient memory speed requirements. Simulations are presented using a variety of work loads, traffic types and switch sizes. The simulations demonstrate the performance benefit of FARR over previous input-buffered switch algorithms and show that FARR performs similarly to Fair Prioritized Round Robin running on an output-buffered switch.