A new isolation technology for mixed-mode and general mixed-technology SOC chips

With higher levels of integration in VLSI, the importance of limiting undesirable interactions (i.e. crosstalk) between different circuits fabricated on a common Si substrate is increasing. Such interaction, known as substrate coupling, is more significant in mixed-mode or mixed-technology ICs, particularly in the high frequency regime. In commercial operations, the procedure for mixed-mode (or mixed-technology) device development has always become a laborious cycle of circuit design/simulation, layout, pilot run, and testing, before a final compromised (not necessarily optimized) result is reached. Consequently, the whole process of mixed-technology IC production is very time-consuming, costly and may lead to poor market timing. In this paper, a new isolation method is proposed in which penetrating protons are applied at selected locations on each IC prior to packaging. Experimental results indicated that a 25-30 dB improvement could be achieved by applying a low-fluence proton bombardment to the isolation-intended region of a metal pad pattern on a /spl sim/10 /spl Omega/-cm Si substrate. In addition, a proton-enhanced alternative-SOI structure from initially lightly doped wafers may be achieved for all SOC (system-on-a-chip) purposes. This option fully exploits the proton treatment, since the resistivity enhancement is most effective in lightly doped silicon. This proton isolation technology should be of interest to any mixed-technology SOC producer longing for the opportunity to break the aforementioned development cycle from the outset into a more familiar development sequence, while still leading to as-designed, optimum products.