A Simplified Space Vector Pulsewidth Modulation Scheme for Three-Phase Cascaded H-Bridge Inverters

A simplified space vector pulsewidth modulation (SVPWM) for three-phase cascaded H-bridge (CHB) inverters is presented in this article. Treating each unit as a three-level inverter and adopting serial calculation mode, a CHB inverter is modulated unit by unit using three-level SVPWM. Duty cycles of real sector are obtained by mapping duty cycles of sector 1, in which the calculation of three-level SVPWM is done. The process of implementing multilevel SVPWM is simplified to the process of implementing three-level SVPWM. By reusing field-programmable gate array (FPGA) chip resource that is used for the calculation of three-level SVPWM, the presented SVPWM can be easily adopted for a CHB inverter with different number of units, while the FPGA chip resource utilization is reduced significantly. In addition, the presented SVPWM provides an effective switching frequency higher than the switching frequency of IGBTs. Simulation and experimental results are provided to verify the feasibility of the presented SVPWM.