Programming and development environments for configurable computing systems

Heterogeneous configurable computing systems containing general-purpose processors, special-purpose processors, field-programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) present several programming and development challenges. The ADAPTERS effort is addressing these challenges by focusing on three technology areas: (1) a unified data flow programming environment, (2) hardware/software partitioning and mapping tool, along with a system level modeling tool, and (3) a dynamic reconfiguration run-time environment for FPGAs. To investigate automatic mapping techniques, a constant false alarm rate (CFAR) application has been implemented on a combined PC/WILDFORCE platform. The combined platform containing FPGAs provided a 20% improvement in the end-to-end latency compared to a software solution running on a PC. An image compression example has also been developed to explore mode-based dynamic FPGA reconfiguration. The dynamic reconfiguration technology being developed can be used to adapt the behavior of systems, such as satellites, to changing internal and external conditions.