Incorporating Virtual Metrology Into Failure Prediction

In the semiconductor manufacturing process, wafer fabrication is followed by a wafer test, which filters out defective dies by performing several physical inspections. Only dies that pass the wafer test are used in an assembly and final test. However, a few of them eventually fail the final test as well. We address this issue by formulating a die-level failure prediction problem, focusing on utilizing the sampling inspections in the wafer test, which are performed only for a few sampled dies. Here, we propose a joint prediction model that simultaneously performs both virtual metrology and failure prediction tasks based on a multi-task learning scheme. The proposed model incorporates the virtual metrology task as missing value imputation for non-sampled dies to improve the failure prediction task. We demonstrate the effectiveness of the proposed model by evaluating it on real-world data from a semiconductor manufacturer.