Solutions for CMOS current amplifiers with high-drive output stages

Design guidelines for CMOS current amplifiers with a high-drive capability are discussed in detail, paying special attention to the implementation of output stages with improved linearity performance. As a design example, two different current amplifiers were realized in a 1.2-/spl mu/m process and experimentally tested. Both circuits used a 5-V power supply and dissipated 5.5 and 4 mW, respectively. The open-loop gain was found to be 90 and 100 dB and the gain-bandwidth product was 8 and 10 MHz. The two amplifiers provide bipolar output currents as high as 15 and 7 mA, with a maximum total harmonic distortion of around -54 dB, using a quiescent current in the output branches of only 200 /spl mu/A.