Low-cost, high-performance CNN simulator implemented in FPGA

Recently, we proposed a concept of a non-microprocessor based cellular neural network (CNN) simulator. An 8-bit FPGA based prototype of a 256/spl times/512 cell simulator is now fully operational and yields quite encouraging results. A 30 MHz implementation in fact outperforms 200 MHz Pentium based PC simulation. As some interesting solutions have been incorporated in the simulator design, this paper focuses on some aspects of implementation of the simulator. Furthermore, several points where further optimisation of processes is possible at low cost have been discovered.