Modeling the Effects of Printed-Circuit-Board Parasitics on the Switching Performance of Wide-Bandgap Applications

Wide-bandgap (WBG) devices, like devices based on Silicon-Carbide (SiC) and Gallium-Nitride (GaN), incorporate smaller capacitances and thus faster switching dynamics than traditional semiconductor devices. The size of these capacitances reaches the same order of magnitude than the parasitic elements of the printed circuit board (PCB). This has to be addressed effectively, in order to achieve the full potential of WBG devices. A novel methodology is introduced in this work, which helps to predict the effects of parasitic components of the PCB layout on the dynamic behavior of a power switch. The proposed methodology provides a detailed model, which incorporates the parasitic elements of the PCB design. This model is translated into a simple metamodel, using a design-of-experiment (DoE) methodology. With this metamodel, a design-space which utilizes single and multiple parasitic and discrete parameters to predict the impact on the switching behavior is generated. The parasitic parameters are estimated with simple geometry approximations of the PCB design. The obtained metamodel enables PCB designers to map performance objectives of the switching dynamics, such as voltage/current overshoot, to layout parameters before manufacturing. The methodology is validated with simulation and experimental results in the context of the gate-source voltage overshoot of a GaN-prototype, showing high accuracy.