A systolic Reed-Solomon encoder

An architecture for a Reed-Solomon (RS) encoder is presented, consisting of r+1 systolic cells, where r is the redundancy of the code. The systolic encoder is systematic, does not contain any feedback or other global signals, its systolic cells are of low complexity, and it is easily reconfigurable for variable redundancy and changes in the choice of generator polynomial of the code. The encoding algorithm is based on the Cauchy representation of the generator matrix of the code. This architecture is suitable for very high-speed applications where global signals (such as the feedback line present in the traditional RS encoder design) and the need for global synchronization may pose restrictions on the achievable switching speed of the encoder.<
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