A 1 volt CMOS 2/4 level FSK digital demodulator for pager applications

A 2/4-level FSK digital demodulator for integration in a single multi-standard pager chip is presented. The demodulator function is based on counting the zero crossings of the FSK signal. Frequency offset due to crystal imperfections, etc. is corrected. The output BER is 0.7% and 5% for input CNR of 4 dB for 2-level and 4-level FSK respectively with frequency offset of 2 kHz. This design uses 0.8-/spl mu/m CMOS technology and operates with a power supply as low as 1 V.