A design equation for the load resistors that ensure stability for potentially unstable transistors

This paper presents a mathematically compact design equation for use in resistive stabilization of potentially unstable transistors. The design equation relates the necessary load resistors directly to the device S-parameters and it can be used for either series or shunt loading. For demonstration purposes, the design equation is applied to on-wafer measured S-parameters of an LDMOS transistor and a SiC MESFET.