Numerical simulations of surface states effects on GaAs power MESFETs

Summary form only given. The effects of surface states on the gate offset regions of GaAs power MESFETs are analyzed using a two-dimensional device simulator with a Shockley-Read-Hall statistics model for the surface states. Assuming electron trap type surface states and hole trap type surface states, it is found that the trap properties cause a large difference in DC performance and pulse operation of the FETs.