HDL program design style and skill in LSI control system

When using the HDL for the design of LSI control circuit, due to the limiting factors such as the language syntax, synthesis tools and circuit constraints, and in the absence of the system algorithm, the language structure will vary when modeling the different devices or circuits, even for modeling the same device or circuit under different constraints. For this reason, this paper propose the concept of the design style and skill, and also explains this concept using the practical Verilog HDL model.