Impact of Work Function Variation, Line-Edge Roughness, and Ferroelectric Properties Variation on Negative Capacitance FETs

In this paper, the impacts of work function variation (WFV), line-edge roughness (LER), and ferroelectric properties variation on the threshold voltage, subthreshold swing (SS), Ion, and Ioff variations are analyzed comprehensively for negative capacitance ultra-thin body SOI MOSFETs (NCSOI) compared with SOI MOSFETs (SOI). For LER induced threshold voltage variation (σVt), NC-SOI MOSFETs exhibit smaller σVt (= 3.8 mV) than the SOI MOSFETs (σVt = 17.6 mV). For analyzing WFV of NC-SOI MOSFETs, two scenarios are considered including (I) same WFV patterns, and (II) different WFV patterns between the external and internal metal gates. Compared with SOI, NC-SOI with scenario (I) exhibits comparable WFV induced σVt (= 16.2 mV), and NC-SOI with scenario (II) exhibits larger WFV induced σVt (= 28.5 mV). In scenario (II), different WFV patterns between the internal and external gates result in V
_FE
(voltage drop across the ferroelectric layer) variations, which increases the WFV induced σVt for NC-SOI. LER dominates energy-delay product variations (σEDP), and NC-SOI MOSFETs show smaller σEDP than SOI MOSFETs. Besides, NC-SOI MOSFETs with thicker ferroelectric layer thickness (T
_FE
), larger coercive electric field (E
_C
), and smaller remnant polarization (P
₀
) show smaller LER induced σVt and σSS. Ferroelectric properties variations show negligible impact on the WFV induced σVt and σSS.