A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network

A broad range of new high-volume consumer applications require the availability of low-power, battery operated, wireless microsystems. These systems should conciliate a sufficient battery lifetime with reduced overall dimensions (including antenna), low cost and versatility. The design of such systems highlights many tradeoffs between performances, cost and power consumption. These considerations led our group to choose a direct-conversion scheme for a distributed sensors application. The key blocks for this architecture have been realized and measured in a 0.5 /spl mu/m CMOS technology, validating this approach. From these results, the total power consumption of a receiver operating in the 433 MHz ISM band is expected as low as 1.4 mW, under 1.2 V supply, for a sensitivity of -100 dBm and a 20 kbit/s data rate. The transmitter provides 9 dBm output power under the same supply voltage, with a 35% efficiency.