Versatile single-chip digital TV encoder based on programmable hardware (CPLD)

This paper discusses the synergy effects, which can be used to design a versatile multistandard digital television encoder with minimum hardware requirements. The paper shows the implementation possibilities of the signal-processing algorithms, which are used by modern broadband applications, in complex programmable logic devices (CPLDs). This is done by the example of a highly integrated digital TV encoder, which has been developed at the Chair of Communications Technology for measurement purposes. The low-chip-count solution is capable of encoding and modulating for satellite, cable and terrestrial transmission according to the European Digital Video Broadcasting Standards (DVB).