Simulation Study of a Low Switching Loss FD-IGBT With High $dI/dt$ and $dV/dt$ Controllability

In this brief, a novel floating dummy insulated gate bipolar transistor (FD-IGBT) is proposed and investigated by simulation. A floating n region and a p+ region shorted with an emitter in the floating p-base region are introduced to form an open-base transistor, and the voltage of the floating p-base region can be clamped by this transistor. In the turn-ON transient, the pile-up of holes in the floating p-base region increases its quasi-Fermi potential and leads to punch-through of the floating n region at a low voltage, which in turn clamps the voltage of the floating p-base region, decreasing the Miller capacitance and thereby the reverse gate charging current from the floating p-base region to the gate. As a result, the proposed FD-IGBT demonstrates not only dramatically reduced turn-ON energy loss for the lower Miller capacitance but also excellent controllability on dI
_CE
/dt and dV
_CE
/dt, and hence on the reverse recovery dV
_KA
/dt of the free-wheeling diode (FWD) for the lower reverse gate charging current. TCAD simulation results indicate that, for the same E
_ON
+ E
_OFF
of 90.8 mJ/cm
²
, dI
_CE
/dt of the proposed IGBT and the reverse recovery dV
_KA
/dt of FWD are decreased by 87.7% and 58.2%, respectively, compared with the conventional one.