Performance tradeoffs in sequencer design on a new G4 PowerPC/sup TM/ microprocessor

The microprocessor discussed in this paper is a new member of the G4 family of PowerPC microprocessors with AltiVec/sup TM/ enhanced technology, intended for high performance desktop systems. This four-way superscalar design is more deeply pipelined than previous designs in order to achieve greater frequency. The challenge in increasing frequency is to translate most or all of that increase into performance increases, and this requires careful analysis from a performance simulator. This paper specifically looks at how the interaction between frequency and performance goals affected the design of the new G4 instruction sequencer.