Scalable hybrid integration of CMOS circuits and fluidic networks for biosensor applications

CMOS-based optical and electrical sensors are attractive for lab-on-chip applications, where they provide high-sensitivity and dense scalability in a small, low-cost form factor. However, controlled delivery of fluid samples to the chip surface remains a difficult obstacle for lab-on-CMOS development. In this paper, we present a method for the scalable integration of fluidic channels and silicon integrated circuit (IC) substrates using a commercial fan-out wafer-level packaging (FOWLP) fabrication approach. After planar, near-seamless embedding of ICs in compression-molded epoxy wafers, we use standard semiconductor processing methods to define planar electrical contacts, and multi-layer laser-cut microfluidics are used to define channels over the IC surface. In the completed device, both electrical and fluidic routing are provided to a custom CMOS optical sensor IC, and an optical transmission experiment demonstrates combined connectivity and generalizable platform utility for lab-on-CMOS and lab-on-chip applications.