Performance analysis of the I-structure software cache on multi-threading systems

Non-blocking multithreaded execution models have been proposed as an effective means to overlap computation and communication in distributed memory systems without any hardware support. Even with the capability of latency tolerance in these execution models, each remote memory request still incurs the cost of communication interface overhead. We therefore designed and implemented our I-structure software cache system to further reduce communication overhead for non-blocking multithreaded execution. In this paper, we present analytical models for the performances of a multithreading system with and without I-structure software cache support. We compare our model's prediction with our experimental results on an existing multithreaded architecture platform. The analytical models allow us to predict at what ratio of communication latency/processing speed the implementation of I-structure software cache becomes profitable for applications with different characteristics.