High performance serial ATA Gen3 controllers on FPGA devices

An increasing number of high performance computing applications developed on reconfigurable platforms require access to mass storage devices for storing a large amount of data. The multi-gigabit transceivers integrated in FPGA devices allow the development of a wide range of communication protocols. The Serial ATA protocol provides a solution for accessing mass storage devices at high transfer rates. This paper describes the design and implementation of Serial ATA Gen3 Host and Device controllers on Xilinx 7-Series FPGA devices to facilitate the access of high performance and embedded applications to non-volatile storage devices, e.g. hard disk drives and solid state drives. The controllers can interface with commodity Serial ATA Gen3 storage devices and host bus adapters at a data transfer rate of 6.0 Gbps. For an increased performance, both Host and Device controllers support the Native Command Queueing (NCQ) feature set, in addition to the regular read and write commands. The experimental results demonstrate the viability of the Serial ATA Gen3 controllers and prove a sustained throughput close to the maximum theoretical data transfer rates of the Serial ATA protocol, thus having the potential of being an important building block of complex systems targeting a wide range of applications.