Extension of hardware-accelerated real-time task schedulers for support of quad-core processors

This paper presents the design of a coprocessor that performs an efficient task scheduling for quad-core real-time systems. The proposed solution is based on two algorithms: Earliest Deadline First (EDF) algorithm that is proved to always find an optimum ordering of hard real-time tasks and the priority-based FCFS algorithm, which is suitable for non-real-time tasks. The proposed coprocessor can efficiently handle any combination of both types of tasks even though they use different parameters for scheduling. Thanks to HW implementation of the scheduler, the operations are performed in two clock cycles regardless of the current and the maximum number of tasks in the system. The proposed coprocessor is optimized for quad-core CPUs, which can lead to much higher performance of real-time embedded systems than the other schedulers. An existing approach originally designed for dual-core systems was used, known as semaphore approach. The new scheduler was verified using UVM and 256 million instructions with randomly generated deadline/priority values. The synthesis results of the new coprocessor designed for quad-core CPUs were compared to the synthesis results of previous versions of the scheduler. The quad-core version of the scheduler consumes only from 1% to 27% more LUTs than the single-core version.