An analytical model of simultaneous switching noise in CMOS systems

An accurate and analytical model for simultaneous switching noise (SSN) on ground lines in CMOS circuits is presented. This model can compute SSN for the case where only some drivers switch and the others remain quiet, that is, the model considers the loading effects on the quiet drivers. It was confirmed that the proposed model is more accurate than the existing ones through HSPICE simulation using the level 28 model for short-channel MOSFETs. The proposed model can provide useful design guides for CMOS driver circuits.