Characterization of the Effect of Pulse Quenching on Single-Event Transients in 65-nm Twin-Well and Triple-Well CMOS Technologies

As chip technologies scale down in size, multiple adjacent logic nodes are often affected by a single high-energy ion strike. The so-called pulse quenching effect, induced by single-event charge sharing collection, has a significant effect on single-event transients (SETs). In this paper, the effect of pulse quenching on SETs is quantitatively characterized in 65-nm twin-well and triple-well CMOS technologies. Two groups of heavy ion experiments on two inverter chains were performed for the characterizations, and the effect of pulse quenching on SETs was quantitatively analyzed in detail.