A Methodology for Efficient Dynamic Spatial Sampling and Reconstruction of Wafer Profiles

In semiconductor manufacturing, metrology is generally a high cost nonvalue-added operation that significantly impacts on cycle time. As such, reducing wafer metrology continues to be a major target in semiconductor manufacturing efficiency initiatives. A novel data-driven spatial dynamic sampling methodology is presented that minimizes the number of sites that need to be measured across a wafer surface while maintaining an acceptable level of wafer profile reconstruction accuracy. The methodology is based on analyzing historical metrology data using forward selection component analysis (FSCA) to determine, from a set of candidate wafer sites, the minimum set of sites that need to be monitored in order to reconstruct the full wafer profile using statistical regression techniques. Dynamic sampling is then implemented by clustering unmeasured sites in accordance with their similarity to the FSCA selected sites and temporally selecting a different sample from each cluster. In this way, the risk of not detecting previously unseen process behavior is mitigated. We demonstrate the efficacy of the proposed methodology using both simulation studies and metrology data from a semiconductor manufacturing process.