Enhancement-Mode GaN MOS-HEMTs With Recess-Free Barrier Engineering and High- ${k}$ ZrO2 Gate Dielectric

Enhancement-mode GaN MOS-HEMTs with a uniform threshold voltage (V
_th
~ 2.2 ± 0.25 V at I
_D
= 1 μA/mm) have been achieved by a recess-free barrier engineering technique in conjunction with a high-k gate dielectric. The design includes an ultrathin (~6 nm) Al
_0.2
Ga
_0.8
N barrier preserving the two dimensional electron gas (2DEG) mobility underneath the gate and a selective area barrier regrowth to restore the 2DEG at the access regions. A high-k ZrO
₂
gate dielectric was employed to enhance the gate control over the channel. The common issue of recess-induced damage was mitigated. The highquality gate stack results not only in a highly uniform and large V
_th
, but also small hysteresis, minimal gate lag, low on-resistance, and high output current in the E-MOS-HEMTs.