Extending trench DRAM technology to 0.15 /spl mu/m groundrule and beyond

This report describes improvements in the trench DRAM technology for 0.15 /spl mu/m groundrule and beyond. The optimum cell layout is 8F/sup 2/ with a cell area of only 0.18 /spl mu/m/sup 2/ for a 0.15 /spl mu/m groundrule. High node capacitance and low node contact resistance are demonstrated for these small groundrules. By using a dual gate oxide and self-aligned support junctions, the different performance requirements of array and support devices can be met. These technology features and their extendibility are evaluated on a 256 Mb DRAM design.