Low power CMOS digital design for multimedia processors

Low-power, high-speed CMOS circuit design by means of supply-voltage (V/sub DD/) and threshold-voltage (V/sub TH/) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower V/sub DD/ for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control V/sub DD/ and V/sub TH/ as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.