FIR filter design and implementation on reconfigurable computing technology

This paper elaborates on the design and implementation of a finite impulse response (FIR) filter on reconfigurable computing technology (RCT). RCT uses field programmable gate array (FPGA) technology as a flexible platform for implementing and improving the design. The FPGA used for this design is the Xilinx XC4062 chip. The paper outlines the advantages of using RCT in improving the performance of the designed digital filter. It describes the methodology followed throughout the design, analysis, verification, simulation, and test of the digital circuit. The design methodology does scale to more complex functions and architectures.