SiC MOSFETs designed and evaluated for linear mode operation

The U.S. Army Research Laboratory (ARL) and Wolfspeed developed silicon carbide (SiC) vertical MOSFETs for linear-mode operation. The motivation is to determine whether SiC's material properties enable SiC MOSFETs to withstand higher pulse-current density and energy dissipation than is achievable with commercial silicon linear-mode MOSFETs. The SiC device is a 3.3 mm × 3.3 mm chip with a thick gate oxide and a long channel to provide flat drain current vs. drain voltage characteristics. The MOSFETs were evaluated in their saturation region at drain-source voltages up to 200 V for pulses up to 16.5-ms wide to determine their maximum current amplitude and energy dissipation capability. At a current density of 45 A per square centimeter over the chip area, the MOSFETs survived pulse energy of up to 14.7 J, or 135 J per square centimeter. The results for these small test devices encourage further investigation of the operation of larger-area SiC MOSFETs in linear mode.