Design of low-distortion CMOS Class E power amplifier for wireless communications

This paper describes a low-distortion Class E power amplifier which is suitable for integrated circuit implementation. Both N-type and P-type transistors are employed to achieve a balanced circuit operation thereby reducing the significant distortion of the conventional Class E power amplifier. The power amplifier operates at 1.8 GHz and is simulated with a 0.6-/spl mu/m CMOS process at a supply voltage of 2.5 V.