Jitter effects in continuous-time /spl Sigma//spl Delta/ modulators with delayed return-to-zero feedback

A general method to design continuous-time Sigma-Delta (/spl Sigma//spl Delta/) modulators with delayed return-to-zero (RZ) feedback pulse is presented. This method can be applied to design modulators with any arbitrary delay and pulse width. It is shown that the keypoint to avoid the degrading effects of clock jitter is to generate a low jitter feedback pulse-width using a monostable multivibrator.